Add SSE2 and SSE4.1 linear resamplers
Currently the only way SSE 4.1 is detected is by using __get_cpuid, i.e. with GCC. Windows' IsProcessorFeaturePresent does not report SSE4.1 capabilities.
This commit is contained in:
committed by
Chris Robinson
parent
3b2fcb3ef6
commit
fc0be88c0f
@@ -909,8 +909,12 @@ static void alc_initconfig(void)
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ReadALConfig();
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capfilter = 0;
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#ifdef HAVE_SSE
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#if defined(HAVE_SSE4_1)
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capfilter |= CPU_CAP_SSE | CPU_CAP_SSE2 | CPU_CAP_SSE4_1;
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#elif defined(HAVE_SSE2)
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capfilter |= CPU_CAP_SSE | CPU_CAP_SSE2;
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#elif defined(HAVE_SSE)
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capfilter |= CPU_CAP_SSE;
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#endif
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#ifdef HAVE_NEON
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capfilter |= CPU_CAP_NEON;
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@@ -940,6 +944,8 @@ static void alc_initconfig(void)
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capfilter &= ~CPU_CAP_SSE;
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else if(len == 4 && strncasecmp(str, "sse2", len) == 0)
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capfilter &= ~CPU_CAP_SSE2;
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else if(len == 6 && strncasecmp(str, "sse4.1", len) == 0)
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capfilter &= ~CPU_CAP_SSE4_1;
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else if(len == 4 && strncasecmp(str, "neon", len) == 0)
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capfilter &= ~CPU_CAP_NEON;
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else
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@@ -91,6 +91,14 @@ static ResamplerFunc SelectResampler(enum Resampler Resampler, ALuint increment)
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case PointResampler:
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return Resample_point32_C;
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case LinearResampler:
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#ifdef HAVE_SSE4_1
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if((CPUCapFlags&CPU_CAP_SSE4_1))
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return Resample_lerp32_SSE41;
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#endif
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#ifdef HAVE_SSE2
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if((CPUCapFlags&CPU_CAP_SSE2))
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return Resample_lerp32_SSE2;
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#endif
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return Resample_lerp32_C;
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case CubicResampler:
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return Resample_cubic32_C;
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+11
-4
@@ -139,7 +139,11 @@ void FillCPUCaps(ALuint capfilter)
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{
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caps |= CPU_CAP_SSE;
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if((cpuinf[0].regs[3]&(1<<26)))
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{
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caps |= CPU_CAP_SSE2;
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if((cpuinf[0].regs[2]&(1<<19)))
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caps |= CPU_CAP_SSE4_1;
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}
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}
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}
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}
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@@ -164,10 +168,13 @@ void FillCPUCaps(ALuint capfilter)
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caps |= CPU_CAP_NEON;
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#endif
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TRACE("Got caps:%s%s%s%s\n", ((caps&CPU_CAP_SSE)?((capfilter&CPU_CAP_SSE)?" SSE":" (SSE)"):""),
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((caps&CPU_CAP_SSE2)?((capfilter&CPU_CAP_SSE2)?" SSE2":" (SSE2)"):""),
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((caps&CPU_CAP_NEON)?((capfilter&CPU_CAP_NEON)?" Neon":" (Neon)"):""),
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((!caps)?" -none-":""));
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TRACE("Got caps:%s%s%s%s%s\n",
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((caps&CPU_CAP_SSE) ? ((capfilter&CPU_CAP_SSE) ? " SSE" : " (SSE)") : ""),
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((caps&CPU_CAP_SSE2) ? ((capfilter&CPU_CAP_SSE2) ? " SSE2" : " (SSE2)") : ""),
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((caps&CPU_CAP_SSE4_1) ? ((capfilter&CPU_CAP_SSE4_1) ? " SSE4.1" : " (SSE4.1)") : ""),
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((caps&CPU_CAP_NEON) ? ((capfilter&CPU_CAP_NEON) ? " Neon" : " (Neon)") : ""),
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((!caps) ? " -none-" : "")
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);
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CPUCapFlags = caps & capfilter;
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}
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@@ -42,6 +42,12 @@ void MixSend_SSE(ALfloat (*restrict OutBuffer)[BUFFERSIZE], const ALfloat *data,
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struct MixGainMono *Gain, ALuint Counter, ALuint OutPos,
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ALuint BufferSize);
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/* SSE resamplers */
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const ALfloat *Resample_lerp32_SSE2(const ALfloat *src, ALuint frac, ALuint increment,
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ALfloat *restrict dst, ALuint numsamples);
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const ALfloat *Resample_lerp32_SSE41(const ALfloat *src, ALuint frac, ALuint increment,
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ALfloat *restrict dst, ALuint numsamples);
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/* Neon mixers */
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void MixDirect_Hrtf_Neon(ALfloat (*restrict OutBuffer)[BUFFERSIZE], const ALfloat *data,
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ALuint Counter, ALuint Offset, ALuint OutPos, const ALuint IrSize,
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@@ -0,0 +1,99 @@
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/**
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* OpenAL cross platform audio library
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* Copyright (C) 1999-2014 by authors.
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Library General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Library General Public License for more details.
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*
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* You should have received a copy of the GNU Library General Public
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* License along with this library; if not, write to the
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* Free Software Foundation, Inc., 59 Temple Place - Suite 330,
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* Boston, MA 02111-1307, USA.
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* Or go to http://www.gnu.org/copyleft/lgpl.html
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*/
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#include "config.h"
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#include <xmmintrin.h>
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#include <emmintrin.h>
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#include "alu.h"
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#include "mixer_defs.h"
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static inline void InitiatePositionArrays(ALuint frac, ALuint increment,
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ALuint *frac_arr, ALuint *pos_arr)
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{
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ALuint frac_tmp;
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pos_arr[0] = 0;
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frac_arr[0] = frac;
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frac_tmp = frac_arr[0] + increment;
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pos_arr[1] = pos_arr[0] + (frac_tmp>>FRACTIONBITS);
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frac_arr[1] = frac_tmp & FRACTIONMASK;
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frac_tmp = frac_arr[1] + increment;
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pos_arr[2] = pos_arr[1] + (frac_tmp>>FRACTIONBITS);
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frac_arr[2] = frac_tmp & FRACTIONMASK;
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frac_tmp = frac_arr[2] + increment;
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pos_arr[3] = pos_arr[2] + (frac_tmp>>FRACTIONBITS);
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frac_arr[3] = frac_tmp & FRACTIONMASK;
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}
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const ALfloat *Resample_lerp32_SSE2(const ALfloat *src, ALuint frac, ALuint increment,
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ALfloat *restrict dst, ALuint numsamples)
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{
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const __m128i increment4 = _mm_set1_epi32(increment*4);
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const __m128 fracOne4 = _mm_set1_ps(1.0f/FRACTIONONE);
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const __m128i fracMask4 = _mm_set1_epi32(FRACTIONMASK);
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alignas(16) union { ALuint i[4]; float f[4]; } pos_;
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alignas(16) union { ALuint i[4]; float f[4]; } frac_;
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__m128i frac4, pos4;
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ALuint pos;
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ALuint i;
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InitiatePositionArrays(frac, increment, frac_.i, pos_.i);
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frac4 = _mm_castps_si128(_mm_load_ps(frac_.f));
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pos4 = _mm_castps_si128(_mm_load_ps(pos_.f));
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for(i = 0;numsamples-i > 3;i += 4)
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{
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const __m128 val1 = _mm_setr_ps(src[pos_.i[0]], src[pos_.i[1]], src[pos_.i[2]], src[pos_.i[3]]);
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const __m128 val2 = _mm_setr_ps(src[pos_.i[0]+1], src[pos_.i[1]+1], src[pos_.i[2]+1], src[pos_.i[3]+1]);
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/* val1 + (val2-val1)*mu */
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const __m128 r0 = _mm_sub_ps(val2, val1);
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const __m128 mu = _mm_mul_ps(_mm_cvtepi32_ps(frac4), fracOne4);
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const __m128 out = _mm_add_ps(val1, _mm_mul_ps(mu, r0));
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_mm_store_ps(&dst[i], out);
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frac4 = _mm_add_epi32(frac4, increment4);
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pos4 = _mm_add_epi32(pos4, _mm_srli_epi32(frac4, FRACTIONBITS));
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frac4 = _mm_and_si128(frac4, fracMask4);
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_mm_store_ps(pos_.f, _mm_castsi128_ps(pos4));
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}
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pos = pos_.i[0];
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frac = _mm_cvtsi128_si32(frac4);
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for(;i < numsamples;i++)
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{
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dst[i] = lerp(src[pos], src[pos+1], frac * (1.0f/FRACTIONONE));
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frac += increment;
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pos += frac>>FRACTIONBITS;
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frac &= FRACTIONMASK;
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}
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return dst;
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}
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@@ -0,0 +1,103 @@
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/**
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* OpenAL cross platform audio library
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* Copyright (C) 1999-2014 by authors.
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Library General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Library General Public License for more details.
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*
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* You should have received a copy of the GNU Library General Public
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* License along with this library; if not, write to the
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* Free Software Foundation, Inc., 59 Temple Place - Suite 330,
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* Boston, MA 02111-1307, USA.
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* Or go to http://www.gnu.org/copyleft/lgpl.html
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*/
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#include "config.h"
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#include <xmmintrin.h>
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#include <emmintrin.h>
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#include <smmintrin.h>
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#include "alu.h"
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#include "mixer_defs.h"
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static inline void InitiatePositionArrays(ALuint frac, ALuint increment,
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ALuint *frac_arr, ALuint *pos_arr)
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{
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ALuint frac_tmp;
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pos_arr[0] = 0;
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frac_arr[0] = frac;
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frac_tmp = frac_arr[0] + increment;
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pos_arr[1] = pos_arr[0] + (frac_tmp>>FRACTIONBITS);
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frac_arr[1] = frac_tmp & FRACTIONMASK;
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frac_tmp = frac_arr[1] + increment;
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pos_arr[2] = pos_arr[1] + (frac_tmp>>FRACTIONBITS);
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frac_arr[2] = frac_tmp & FRACTIONMASK;
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frac_tmp = frac_arr[2] + increment;
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pos_arr[3] = pos_arr[2] + (frac_tmp>>FRACTIONBITS);
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frac_arr[3] = frac_tmp & FRACTIONMASK;
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}
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const ALfloat *Resample_lerp32_SSE41(const ALfloat *src, ALuint frac, ALuint increment,
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ALfloat *restrict dst, ALuint numsamples)
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{
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const __m128i increment4 = _mm_set1_epi32(increment*4);
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const __m128 fracOne4 = _mm_set1_ps(1.0f/FRACTIONONE);
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const __m128i fracMask4 = _mm_set1_epi32(FRACTIONMASK);
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alignas(16) union { ALuint i[4]; float f[4]; } pos_;
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alignas(16) union { ALuint i[4]; float f[4]; } frac_;
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__m128i frac4, pos4;
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ALuint pos;
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ALuint i;
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InitiatePositionArrays(frac, increment, frac_.i, pos_.i);
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frac4 = _mm_castps_si128(_mm_load_ps(frac_.f));
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pos4 = _mm_castps_si128(_mm_load_ps(pos_.f));
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for(i = 0;i < numsamples-3;i += 4)
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{
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const __m128 val1 = _mm_setr_ps(src[pos_.i[0]], src[pos_.i[1]], src[pos_.i[2]], src[pos_.i[3]]);
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const __m128 val2 = _mm_setr_ps(src[pos_.i[0]+1], src[pos_.i[1]+1], src[pos_.i[2]+1], src[pos_.i[3]+1]);
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/* val1 + (val2-val1)*mu */
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const __m128 r0 = _mm_sub_ps(val2, val1);
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const __m128 mu = _mm_mul_ps(_mm_cvtepi32_ps(frac4), fracOne4);
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const __m128 out = _mm_add_ps(val1, _mm_mul_ps(mu, r0));
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_mm_store_ps(&dst[i], out);
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frac4 = _mm_add_epi32(frac4, increment4);
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pos4 = _mm_add_epi32(pos4, _mm_srli_epi32(frac4, FRACTIONBITS));
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frac4 = _mm_and_si128(frac4, fracMask4);
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pos_.i[0] = _mm_extract_epi32(pos4, 0);
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pos_.i[1] = _mm_extract_epi32(pos4, 1);
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pos_.i[2] = _mm_extract_epi32(pos4, 2);
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pos_.i[3] = _mm_extract_epi32(pos4, 3);
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}
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pos = pos_.i[0];
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frac = _mm_cvtsi128_si32(frac4);
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for(;i < numsamples;i++)
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{
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dst[i] = lerp(src[pos], src[pos+1], frac * (1.0f/FRACTIONONE));
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frac += increment;
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pos += frac>>FRACTIONBITS;
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frac &= FRACTIONMASK;
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}
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return dst;
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}
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+56
-10
@@ -300,17 +300,21 @@ ELSE()
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ENDIF()
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SET(SSE_SWITCH "")
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IF(MSVC)
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CHECK_C_COMPILER_FLAG(/arch:SSE HAVE_ARCHSSE_SWITCH)
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IF(HAVE_ARCHSSE_SWITCH)
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SET(SSE_SWITCH "/arch:SSE")
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ENDIF()
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ENDIF()
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IF(NOT SSE_SWITCH)
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SET(SSE2_SWITCH "")
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SET(SSE4_1_SWITCH "")
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IF(NOT MSVC)
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CHECK_C_COMPILER_FLAG(-msse HAVE_MSSE_SWITCH)
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IF(HAVE_MSSE_SWITCH)
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SET(SSE_SWITCH "-msse")
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ENDIF()
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CHECK_C_COMPILER_FLAG(-msse2 HAVE_MSSE2_SWITCH)
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IF(HAVE_MSSE2_SWITCH)
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SET(SSE2_SWITCH "-msse2")
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ENDIF()
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CHECK_C_COMPILER_FLAG(-msse4.1 HAVE_MSSE4_1_SWITCH)
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IF(HAVE_MSSE4_1_SWITCH)
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SET(SSE4_1_SWITCH "-msse4.1")
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ENDIF()
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ENDIF()
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CHECK_C_SOURCE_COMPILES("int foo(const char *str, ...) __attribute__((format(printf, 1, 2)));
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@@ -546,14 +550,16 @@ SET(ALC_OBJS Alc/ALc.c
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SET(CPU_EXTS "Default")
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SET(HAVE_SSE 0)
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SET(HAVE_SSE 0)
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SET(HAVE_SSE2 0)
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SET(HAVE_SSE4_1 0)
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SET(HAVE_NEON 0)
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# Check for SSE support
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OPTION(ALSOFT_REQUIRE_SSE "Require SSE/SSE2 support" OFF)
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OPTION(ALSOFT_REQUIRE_SSE "Require SSE support" OFF)
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CHECK_INCLUDE_FILE(xmmintrin.h HAVE_XMMINTRIN_H "${SSE_SWITCH}")
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IF(HAVE_XMMINTRIN_H)
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OPTION(ALSOFT_CPUEXT_SSE "Enable SSE/SSE2 support" ON)
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OPTION(ALSOFT_CPUEXT_SSE "Enable SSE support" ON)
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IF(ALSOFT_CPUEXT_SSE)
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IF(ALIGN_DECL OR HAVE_C11_ALIGNAS)
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SET(HAVE_SSE 1)
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@@ -570,6 +576,46 @@ IF(ALSOFT_REQUIRE_SSE AND NOT HAVE_SSE)
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MESSAGE(FATAL_ERROR "Failed to enabled required SSE CPU extensions")
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ENDIF()
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OPTION(ALSOFT_REQUIRE_SSE2 "Require SSE2 support" OFF)
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CHECK_INCLUDE_FILE(emmintrin.h HAVE_EMMINTRIN_H "${SSE2_SWITCH}")
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IF(HAVE_EMMINTRIN_H)
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OPTION(ALSOFT_CPUEXT_SSE2 "Enable SSE2 support" ON)
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IF(ALSOFT_CPUEXT_SSE2)
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IF(ALIGN_DECL OR HAVE_C11_ALIGNAS)
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SET(HAVE_SSE2 1)
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SET(ALC_OBJS ${ALC_OBJS} Alc/mixer_sse2.c)
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IF(SSE2_SWITCH)
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SET_SOURCE_FILES_PROPERTIES(Alc/mixer_sse2.c PROPERTIES
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COMPILE_FLAGS "${SSE2_SWITCH}")
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ENDIF()
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SET(CPU_EXTS "${CPU_EXTS}, SSE2")
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ENDIF()
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ENDIF()
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ENDIF()
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IF(ALSOFT_REQUIRE_SSE2 AND NOT HAVE_SSE2)
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MESSAGE(FATAL_ERROR "Failed to enable required SSE2 CPU extensions")
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ENDIF()
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OPTION(ALSOFT_REQUIRE_SSE4_1 "Require SSE4.1 support" OFF)
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CHECK_INCLUDE_FILE(smmintrin.h HAVE_SMMINTRIN_H "${SSE4_1_SWITCH}")
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IF(HAVE_SMMINTRIN_H)
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OPTION(ALSOFT_CPUEXT_SSE4_1 "Enable SSE4.1 support" ON)
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IF(ALSOFT_CPUEXT_SSE4_1)
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IF(ALIGN_DECL OR HAVE_C11_ALIGNAS)
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SET(HAVE_SSE4_1 1)
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SET(ALC_OBJS ${ALC_OBJS} Alc/mixer_sse41.c)
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IF(SSE4_1_SWITCH)
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SET_SOURCE_FILES_PROPERTIES(Alc/mixer_sse41.c PROPERTIES
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COMPILE_FLAGS "${SSE4_1_SWITCH}")
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ENDIF()
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SET(CPU_EXTS "${CPU_EXTS}, SSE4.1")
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ENDIF()
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ENDIF()
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ENDIF()
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IF(ALSOFT_REQUIRE_SSE4_1 AND NOT HAVE_SSE4_1)
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MESSAGE(FATAL_ERROR "Failed to enable required SSE4.1 CPU extensions")
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ENDIF()
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# Check for ARM Neon support
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OPTION(ALSOFT_REQUIRE_NEON "Require ARM Neon support" OFF)
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CHECK_INCLUDE_FILE(arm_neon.h HAVE_ARM_NEON_H)
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@@ -887,7 +887,8 @@ extern ALuint CPUCapFlags;
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enum {
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CPU_CAP_SSE = 1<<0,
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CPU_CAP_SSE2 = 1<<1,
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CPU_CAP_NEON = 1<<2,
|
||||
CPU_CAP_SSE4_1 = 1<<2,
|
||||
CPU_CAP_NEON = 1<<3,
|
||||
};
|
||||
|
||||
void FillCPUCaps(ALuint capfilter);
|
||||
|
||||
@@ -25,6 +25,8 @@
|
||||
|
||||
/* Define if we have SSE CPU extensions */
|
||||
#cmakedefine HAVE_SSE
|
||||
#cmakedefine HAVE_SSE2
|
||||
#cmakedefine HAVE_SSE4_1
|
||||
|
||||
/* Define if we have ARM Neon CPU extensions */
|
||||
#cmakedefine HAVE_NEON
|
||||
|
||||
Reference in New Issue
Block a user